Generic Test Package from Technobis is designed for versatile use, facilitating the purposes of test chip evaluation or demonstration of idea. Making use of Generic Test Package is a quick and economical way to check the performance when chips are packaged, providing valuable information to improve chip design in the next iteration. This saves the effort of designing dedicated package to the final design which is good for volume production.
In Generic Test Package, the followings are included as standard components:
- Package Housing;
- Up to 3 PCBs and Wirebonding from PIC to PCBs;
- TEC unit;
- Fiber and Fiber Alignment
A set of design rules have been established to aid chip designers to formulate design that can easily fit into the “standard” Generic Test Package. For more extensive needs, please also check the design rule for “extended” Generic Test Package or consult Technobis directly.
Other than Generic Test Package, Technobis offers dedicated package design which is more suitable for volume packaging. A highly automatic packaging line has been established to handle mid-to-high- volume.
ADDITIONAL PRODUCT SPECIFICATIONS
You can find the offers of packaging from Technobis and information of their packaging templates here:
|Type||Product ID||Price, EUR||Description|
|Standard||IPPS-1-PCKG||1998||Packaging of 1 die|
|Standard||IPPS-5-PCKG||8070||Packaging of 5 identical dies|
|Custom||-||on request||Price depends on the complexity of your design. Contact us firstname.lastname@example.org|