Test and characterization
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Test and Characterization

This section is dedicated to testing and characterization.

All indicated prices exclude VAT (Value-added-tax).

VLC PHOTONICS

VLC Photonics is an independent design house providing photonic integration services. VLC Photonics expertise has been validated over +10 years working with large corporations and small start-ups or researchers, and our large network of foundry partners allow us to always target the most optimal technology.

TypeProduct IDPrice, EURDescription
CharacterisationVLC-CHAstarting at 2000VLC will characterize the fabricated photonic integrated circuit, by performing electrical and optical measurements of both building blocks and circuits, ideally supported by test structures. Characterization includes optical and electrical testing of builidng blocks and, when possible, circuit level measurements. A full characterization report will be provided afterwards in electronic pdf format. Prices depend on the number of dies to be measured, the number of structures per die, and the type of measurements for each structure.
– 25% academic discount is available for Universities at the condition of acknoledgement of VLC Photonics in scientific publications

TECHNOBIS

Technobis is a group of companies providing development and supply of high-tech instruments and modules for companies worldwide.

Standard Generic Test Package

Extended Generic Test Package

TypeProduct IDPrice, EURDescription
TestingTechnobis PIC testing950 for one chip
1600 for five chips
Technobis PIC testing service is offered based on the prerequisite that chip design is in accordance with the generic test package design rules “ASPIC General Design Rules (For Standard G5)” which can be downloaded from the JePPIX website or Technobis website.

In the standard offer, the following items are included, with the corresponding boundary conditions:

Visual inspection to identify optical I/O damage, waveguide interruptions, metallization not appropriate for wirebonding

  • Boundaries: Not applicable
  • Required input from customer: Not applicable.

IV curve (both forward- and reverse- biased) of max. 5 building blocks (e.g. SOA etc)

  • Boundaries:
    • Forward: Max +1A or +2V (the one that is reached first).
    • Reversed biased: standard is min -3V (can go lower to -10V on request).
  • Inputs from customers:
    • Specifications of the desired limits on forward and reverse biases current and voltage

Probing one optical I/O with single fiber (SM/PM) in one of the following two ways:

  • Biasing max.5 building blocks (e.g. SOA/phase shifter/etc) to record the output spectrum
    • Boundaries:
      • Biasing the same as 2a and 2b
      • Setpoint temperature of 25°C (±10°C on request)
    • Inputs from the customers:
      • Choose one fixed current/voltage setpoint for all the probed building blocks
      • Alignment of slow axis (to TE or TM of chip)
      • Setpoint temperature during test
  • Coupling light into the chip and record signal from building blocks (e.g. photodiodes/SOA/etc)
    • Boundaries:
      • Broadband lightsource centered at 1310nm/1550nm
      • Power of max 2mW
      • Alignment of slow axis (to TE or TM of chip)
      • Setpoint temperature of 25°C (±10°C on request)
    • Inputs from the customers:
      • Expected PD current level
      • Setpoint temperature during test

Reporting

  • Boundary: Not applicable
  • Inputs from customers: not applicable

Note that currently the tests are limited to DC signals. The customer has to communicate the chip design and expected test cases and Technobis would comment on the appropriateness. Technobis will issue a standard data collection template to collect inputs from customers on defining the actual test boundary conditions. A report with plotted results would be provided as the main deliverables. Measured data can be provided if requested by customer.

Items to note:

  1. The standard offer is mainly for indicating whether the chips perform according to expectation with limited types and the number of PIC building blocks to be evaluated in the standard offer. For more complex circuits, including using fiber array for connection to multiple optical I/Os at the same time during testing, the specific requirements on the tests and test routines have to be discussed and clarified with the potential customers and a dedicated quotation on PIC testing would be offered.
  2. The lead time of PIC testing typically ranges from two to six weeks from the moment PICs arrive at Technobis. The lead time is subjected to variations, depending on the quantity of PICs to be tested and availability of equipment.