Current Projects Overview
JePPIX partners are currently actively involved in several projects as detailed below
OpenPICs provides a step change in platform maturity for open access generic integrated photonics technology. The project enables innovative product development. It ensures that a technological edge is maintained through the development of high performance building blocks, processes and products.
OPENPICS is organized around the following four work packages:
Market Demands: Translating products making use of photonic ICs, into building blocks, processes and designs.
Process characterisation: Obtaining data on the production process to improve the production of photonic ICs. So every year, reducing the cost per chip.
Building Block Improvement: Improving the existing sub-circuits (composite building blocks) with the use of models to predict how building blocks will function when they are produced, leading ultimately to “first-time right” design.
Process improvement: The optimization and improvement of the production process to allow for more and better basic building blocks.
This project introduces next generation building blocks into generic integration technology. Challenges addressed include
Selective area growth to enable many different band-gap devices to be created on the same chip at the same time and in combination with a rich range of established generic building blocks.
Buried hetero-structure active regions for high efficiency and high performance gain blocks which are integrated with the full generic platform
High speed modulators and RF circuit engineering on semi-insulating (SI) substrates for the wavelength division multiplexed circuits
The test vehicles to be validated in GETPICS have a particular focus on the design and fabrication of high bit-rate transmitter PICs and WDM chip-scale solutions. This is a Marie-Curie project with partners III-V Lab, Palaiseau and Eindhoven University of Technology.
PICs4All (Photonic Integrated Circuits Accessible to Everyone) is a Coordination and Support Action from the EU Horizon 2020 ICT programme. The purpose is to bring users closer to Photonic Integrated Circuits (PICs) technology, enabling access to highly advanced fabrication facilities for PICs.
PICs4All has set up a European Network of experts in photonics consisting of 9 Application Support Centres (ASC) distributed around Europe whose main task is to stimulate the development of novel applications based on Photonic ICs for a broader range of application fields, to enhance cooperation between universities, clusters, industry, and research centres, and most importantly, to enable access to the PIC technology.
Waferscale Integration of Photonics and Electronics
Photonic Integrated Circuits do not work in isolation; they have optical Input/Output (I/O) channels and electric I/O. The various active optical components in the PIC (the modulators, detectors, lasers, etc.) require sophisticated analog and digital electronic circuits and precision control. For example 100G and 400G telecom transmitters and receivers require state of the art drivers and electronics for digital signal processing.
At the moment, the PICs and ICs are mounted in one housing and connected by traditional wire bonds (a System in a Package). However, this impairs the performance for both technologies both technically and economically. Bringing the photonics and micro-electronics chips together (the so-called hybrid integration) and co-design allow for further miniaturization and subsequently energy and cost savings.
PHASTFlex is working on the development of a fully automated, high precision, cost-effective assembly technology for next generation hybrid photonic packages. Current assembly and packaging technology for PICs lead to custom-engineered solutions; packaging is at least an order of magnitude more expensive than the photonic chips which are becoming more readily available through generic platform technology. This is a major bottle-neck to rapid market penetration.
PHASTFlex is developing an innovative solution in which InP PICs with active optical functions will be combined with passive dielectric waveguide TriPleX PICs bonded onto an low-temperature co-fired ceramic (LTCC) carrier. In the PHASTFlex concept the waveguides in the TriPleX PIC are released during fabrication to make them movable. Actuators and fixing functions, integrated in the same TriPleX PIC, place and fix the flexible waveguides in the optimal position to achieve peak out-coupled power from the InP PIC. A second feature of the TriPleX chip is mode expansion to match fibre mode size at the optical I/O.