JePPIX Roadmap 2018
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InP-based Photonic Integrated Circuits (PICs) have become firmly established in the market place. InP PIC-enabled transceivers accounted for a 1B$ market share in 2015 and are expected to grow beyond 3 B$ in 2020. Today the application of PICs is broadening to other markets like fibre sensing, medical diagnostics, automotive (LIDAR) and metrology. JePPIX partners SMART Photonics, Fraunhofer HHI and LioniX International are stimulating this development by offering cost-effective open access to advanced PIC foundry processes in InP and silicon nitride technologies. These photonics companies are the core of a vibrant and growing ecosystem, working in important markets in which Europe still holds a lead. The JePPIX organization plays a key role in organizing this eco-system.

Since 2015, JePPIX has moved from EU-subsidized access to a commercially priced service and after an initial dip the increased awareness and enthusiasm for the technology has enabled JePPIX to manage this transition with an increase in use from businesses. In 2018 alone more than 60 different PIC designs were fabricated in 11 multiproject foundry runs, of which more than 30% were for industrial users, and strong business uptake is foreseen in the next 2-5 years. This roadmap addresses the issues of market expansion, including training and capacity planning needed to support that demand.

For this 2018 edition of the roadmap, JePPIX has carried out a survey of expert users in order to gauge user requirements and the need for technology developments going forward. Both InP-foundries, SMART Photonics and Fraunhofer HHI, currently offer a full suite of components including high-performance SOAs, lasers, modulators, detectors and a range of passive components. The technology roadmap includes improving component performance to support higher Baudrates (up to 56 GBaud/s), lowering propagation losses, and improving passive component performance by using 193 nm DUV lithography. A continuous effort is foreseen on improving the reproducibility of the processes. For further improvement in performance, a PIC fabrication roadmap is defined for improving the quality of epitaxial growth and adaption of fabrication equipment to the wafer size and mechanical properties of InP wafers. This edition of the roadmap also looks further ahead to the arrival of future nodes supporting the integration of photonics and electronics on which several research projects are already running.

The silicon nitride foundry, LioniX International, offers its low-loss SiN integration platform (TriPleX) with a variety of passive components and thermal phase shifters, not only for the infrared but also for the visible spectral range. The technology roadmap foresees further lowering of the propagation losses, the adding of low-power stress induced (PZT) phase modulators and extending the platform capabilities by hybrid integration of InP and TriPleX PICs. LioniX is also starting to provide open access to its visible light process, to cover applications outside the communications space, including bio photonics and virtual reality.

All three foundries have a Process Design Kit (PDK) with a range of building blocks that can be used by designers, freeing them from the underlying details of the technology. In cooperation with the JePPIX software partners the contents of the PDKs will be substantially extended to include statistical data for component performance and process tolerances. Further, more emphasis will be put on adding manufacturing rules in the PDKs, and to enable the design software to perform automatic Design Rule Checking (DRC) to reduce the chance of designer mistakes. The contents of building block libraries will be extended and an important development is the so-called PDAFlow API, an interface that enables interoperability between different software tools.

The development of reference packages for prototyping and low-volume production of PICs which are designed according to packaging templates with standardized positions for the electrical and optical ports, is seen as crucial to the development of the PIC market over the next few years. This standardization will also support prototype testing at affordable cost. JePPIX and some of its partners are participating in the PIXAPP Packaging Pilot Line with the ambition to define standardized packaging and test templates and to develop largely automated testing of compliant PICs. The standards are designed such that they support scaling to higher volumes.

The 2018 roadmap synthesizes JePPIX’s analysis of the PIC market and market requirements for the coming 2-5 year timescale. Important technology developments required to foster the foreseen market growth are analyzed in many areas, including fabrication processes and equipment, design software, packaging and testing. JePPIX members are also contributing to the AIM road mapping initiative led by MIT and the World Roadmap for Integrated Photonics, led by Photon Delta.